Receiver and method for controlling equalization

A receiver comprising:

• a first equalizer configured to receive an input data signal through a communication channel and equalize the input data signal based on a first control code to generate a first equalization signal;
• a second equalizer configured to equalize the first equalization signal based on a clock signal and a second control code to generate a second equalization signal;
• a clock data recovery circuit configured to restore the clock signal based on the second equalization signal, deserialize the second equalization signal, and output a deserialized second equalization signal;
• and
• a controller configured to adjust the first control code and the second control code based on the deserialized second equalization signal,
• wherein:
• the controller is further configured to obtain a plurality of accumulation values by using a sign-sign least mean square (SSLMS) algorithm on the deserialized second equalization signal, and adjust the second control code based on the plurality of accumulation values, and
• the plurality of accumulation values respectively correspond to different post-cursors.