Method of manufacturing a semiconductor package and semiconductor package manufactured by the same
AssigneeSK hynix Inc.
InventorsSu Ji Um, Min Hee Park
Life of this patent
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Abstract
A method of manufacturing a semiconductor package of stacked semiconductor chips includes forming a reverse wire bond by bonding one end of a reverse wire to a chip pad of the second-highest semiconductor chip of the stacked semiconductor chips and connecting the other end of the reverse wire to a conductive bump on a chip pad of the uppermost semiconductor chip of the stacked semiconductor chips. The method also includes molding the stacked semiconductor chips with the reverse wire bond using a mold layer. The method further includes processing the mold layer to expose the conductive bump and the other end of the reverse wire in the reverse wire bond through an upper surface of the mold layer.
Claims11
A method of manufacturing a semiconductor package, the method comprising:
- forming a multi-stack structure by stacking at least three semiconductor chips on a carrier substrate with an offset to expose chip pads of the semiconductor chips;
- forming a vertical wire bond by bonding one end of a metal wire to a chip pad of a semiconductor chip under the second-highest semiconductor chip in the multi-stack structure;
- forming a reverse wire bond by bonding one end of a reverse wire to a chip pad of the second-highest semiconductor chip and connecting the other end of the reverse wire to a conductive bump on a chip pad of the uppermost semiconductor chip in the multi-stack structure;
- molding the multi-stack structure with the vertical wire bond and the reverse wire bond using a mold layer;
- and
- processing the mold layer to expose the conductive bump, the other end of the metal wire in the vertical wire bond, and the other end of the reverse wire in the reverse wire bond through an upper surface of the mold layer.
A method of manufacturing a semiconductor package, the method comprising:
- forming a two-level type multi-stack structure by stacking first and second semiconductor chips on a carrier substrate with an offset to expose chip pads of the first and second semiconductor chips;
- forming a reverse wire bond by bonding one end of a reverse wire to a chip pad of the first semiconductor chip and the other end of the reverse wire to a conductive bump on a chip pad of the second semiconductor chip;
- molding the two-level type multi-stack structure using a mold layer;
- and
- processing the two-level type multi-stack structure to expose the conductive bump and the other end of the reverse wire in the reverse wire bond through an upper surface of the mold layer.
Dependencies are inferred from the claim text.