Data sense amplifier circuit with a hybrid architecture
AssigneeMicron Technology, Inc.
InventorsYang Lu, Kang-Yong Kim, Wonjun Choi
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsYang Lu, Kang-Yong Kim, Wonjun Choi
Estimating the term…
Apparatuses and techniques for implementing a data sense amplifier circuit with a hybrid architecture. With the hybrid architecture, the data sense amplifier circuit includes a first set of amplifiers that are shared by multiple banks and includes a second set of amplifiers with multiple subsets dedicated to different banks. The bank-shared amplifiers support memory operations (e.g., a read operation) across multiple banks. Each amplifier within the first set of amplifiers is coupled to at least two banks. The bank-specific amplifiers support usage-based disturbance mitigation for a corresponding bank. Each amplifier within the second set of amplifiers is coupled to one of the multiple banks. The bank-shared amplifiers enable the data sense amplifier circuit to have a smaller footprint while the bank-specific amplifiers enable the data sense amplifier circuit to support usage-based disturbance mitigation and avoid conflicts associated with some sequences of commands.
An apparatus comprising:
A method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.