Display panel and display device

A display panel, comprising:

• at least two display regions, wherein the at least two display regions comprise a first display region and a second display region;
• and
• a pixel circuit, wherein the pixel circuit comprises at least a first pixel circuit and a second pixel circuit, the first pixel circuit is disposed in the first display region, and the second pixel circuit is disposed in the second display region;
• wherein the pixel circuit receives a bias adjustment signal, the bias adjustment signal comprises a first bias adjustment signal and a second bias adjustment signal, in response to a refresh rate of the first display region being f1, the first pixel circuit receives the first bias adjustment signal, and in response to a refresh rate of the second display region being f2, the second pixel circuit receives the second bias adjustment signal, wherein f1≠f2;
• and
• wherein the display panel further comprises a second signal bus and a third signal bus, wherein the second signal bus is electrically connected to the first pixel circuit, the third signal bus is electrically connected to the second pixel circuit, the second signal bus is configured to provide the first bias adjustment signal to the first pixel circuit, and the third signal bus is configured to provide the second bias adjustment signal to the second pixel circuit,
• wherein the display panel further comprises a bias adjustment signal output terminal, wherein the bias adjustment signal output terminal is configured to provide the bias adjustment signal;
• wherein the bias adjustment signal output terminal comprises a second bias adjustment signal output terminal and a third bias adjustment signal output terminal, and the second bias adjustment signal output terminal is configured to provide the first bias adjustment signal for the first pixel circuit and the third bias adjustment signal output terminal is configured to provide the second bias adjustment signal for the second pixel circuit;
• and
• the second signal bus is electrically connected to the second bias adjustment output terminal, and the third signal bus is electrically connected to the third bias adjustment output terminal,
• wherein the display panel comprises m1 display regions, m1 is an integer greater than or equal to 3, and in a second working mode, at least two display regions among the m1 display regions have a same refresh rate;
• the display panel comprises m2 bias adjustment signal output terminals, m2<m1, and at least one of the m2 bias adjustment signal output terminals provides a same bias adjustment signal for pixel circuits of the at least two display regions with the same refresh rate.

A display device comprising a display panel, wherein the display panel comprises:

• at least two display regions, wherein the at least two display regions comprise a first display region and a second display region;
• and
• a pixel circuit, wherein the pixel circuit comprises at least a first pixel circuit and a second pixel circuit, the first pixel circuit is disposed in the first display region, and the second pixel circuit is disposed in the second display region;
• wherein the pixel circuit receives a bias adjustment signal, the bias adjustment signal comprises a first bias adjustment signal and a second bias adjustment signal, in response to a refresh rate of the first display region being f1, the first pixel circuit receives the first bias adjustment signal, and in response to a refresh rate of the second display region being f2, the second pixel circuit receives the second bias adjustment signal, wherein f1+f2;
• and
• wherein the display panel further comprises a first signal bus, wherein the first signal bus is electrically connected to the first pixel circuit and the second pixel circuit respectively, the first signal bus is configured to provide the first bias adjustment signal to the first pixel circuit in a first period, and to provide the second bias adjustment signal to the second pixel circuit in a second period, or
• wherein the display panel further comprises a second signal bus and a third signal bus, wherein the second signal bus is electrically connected to the first pixel circuit, the third signal bus is electrically connected to the second pixel circuit, the second signal bus is configured to provide the first bias adjustment signal to the first pixel circuit, and the third signal bus is configured to provide the second bias adjustment signal to the second pixel circuit,
• wherein the display panel further comprises a bias adjustment signal output terminal, wherein the bias adjustment signal output terminal is configured to provide the bias adjustment signal;
• wherein the bias adjustment signal output terminal comprises a second bias adjustment signal output terminal and a third bias adjustment signal output terminal, and the second bias adjustment signal output terminal is configured to provide the first bias adjustment signal for the first pixel circuit and the third bias adjustment signal output terminal is configured to provide the second bias adjustment signal for the second pixel circuit;
• and
• the second signal bus is electrically connected to the second bias adjustment output terminal, and the third signal bus is electrically connected to the third bias adjustment output terminal,
• wherein the display panel comprises m1 display regions, m1 is an integer greater than or equal to 3, and in a second working mode, at least two display regions among the m1 display regions have a same refresh rate;
• the display panel comprises m2 bias adjustment signal output terminals, m2<m1, and at least one of the m2 bias adjustment signal output terminals provides a same bias adjustment signal for pixel circuits of the at least two display regions with the same refresh rate.