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US 12,518,676 B2Granted
Memory architectures for hybrid cluster displays
AssigneeX Display Company Technology Limited
InventorsImre Knausz, Ronald S. Cok
Life of this patent
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Abstract
A hybrid display includes pixel clusters and a display controller operable to provide pixel values to the cluster controllers. Each pixel cluster incudes (i) pixels; (ii) a pixel memory for storing fewer than two pixel values for each of the pixels; and (iii) a cluster controller operable to (a) control the pixels to emit light corresponding to the pixel values, (b) receive pixel values, and (c) store the pixel values in the pixel memory. The pixel values are digital values and each of the cluster controllers is operable to receive pixel values from the display controller and store the pixel values in the pixel memory at the same time that the cluster controller controls the pixels to emit light corresponding to the pixel values.
Claims19
A hybrid display, comprising:
- pixel clusters, each of the pixel clusters comprising (i) pixels;
- (ii) a pixel memory for storing pixel values for each of the pixels;
- and (iii) a cluster controller operable to (a) control the pixels to emit light corresponding to the pixel values, (b) receive the pixel values, and (c) store the pixel values in the pixel memory;
- and
- a display controller operable to provide the pixel values to the cluster controller for each of the pixel clusters,
- wherein, for each of the pixel clusters, the cluster controller is operable to store one or more of the pixel values in the pixel memory at a same time that the cluster controller controls the pixels to emit light using one or more of the pixel values, and
- wherein the cluster controller is operable to (i) receive an input address of one or more input pixel values, (ii) compare the input address to an output address of a row, the output address being of one or more output pixel values that are used to control the pixels to emit light, and (iii) write the one or more input pixel values into the pixel memory only if the input address does not match the output address.
4 more elements
A hybrid display, comprising:
- pixel clusters, each of the pixel clusters comprising (i) pixels;
- (ii) a pixel memory for storing pixel values for each of the pixels;
- and (iii) a cluster controller operable to (a) control the pixels to emit light corresponding to the pixel values, (b) receive the pixel values, and (c) store the pixel values in the pixel memory;
- and
- a display controller operable to provide the pixel values to the cluster controller for each of the pixel clusters,
- wherein, for each of the pixel clusters, the cluster controller is operable to store one or more of the pixel values in the pixel memory at a same time that the cluster controller controls the pixels to emit light using one or more of the pixel values,
- wherein, for each of the pixel clusters:
- each of the pixels comprises C light emitters;
- each of the pixel values comprises C luminance values, each corresponding to one of the C light emitters;
- each of the luminance values has D bits;
- the pixels are disposed in an array of M rows and N columns;
- M is no less than two, N is no less than one, and C is no less than one;
- and
- the pixel memory has (i) a storage for pixel values of at least M×N×C×D bits and (ii) at least M row addresses, and
- wherein:
- the pixel memory storage is (M+1)×N×C×D bits in size and the pixel memory has row addresses having a range at least from zero to M, and
- the cluster controller is operable to read output pixel data stored at row address IOUTPUT of the pixel memory (IOUTPUT<(M+1)) and control the pixels corresponding to row address IOUTPUT to emit light corresponding to the output pixel data at a same time that the cluster controller stores input pixel data at one or more row addresses IINPUT of the pixel memory, where IINPUT≠IOUTPUT and IINPUT<(M+1).
14 more elements
A hybrid display, comprising:
- pixel clusters, each of the pixel clusters comprising (i) pixels;
- (ii) a pixel memory for storing digital pixel values for each of the pixels;
- and (iii) a cluster controller operable to (a) control the pixels to emit light corresponding to the digital pixel values, (b) receive the digital pixel values, and (c) store the digital pixel values in the pixel memory;
- and
- a display controller operable to provide the digital pixel values to the cluster controller for each of the pixel clusters,
- wherein, for each of the pixel clusters, the cluster controller is operable to store one or more of the digital pixel values in the pixel memory at a same time that the cluster controller controls the pixels to emit light using one or more of the digital pixel values,
- wherein, for each of the pixel clusters:
- each of the pixels comprises C light emitters;
- each of the pixel values comprises C luminance values, each corresponding to one of the C light emitters;
- each of the luminance values has D bits;
- the pixels are disposed in an array of M rows and N columns;
- M is no less than two, N is no less than one, and C is no less than one;
- and
- the pixel memory has (i) a storage for digital pixel values of at least M×N×C×D bits and (ii) at least M row addresses,
- wherein the cluster controller is operable to read output pixel data stored at row address IOUTPUT of the pixel memory and control each of the pixels corresponding to row address IOUTPUT to emit light corresponding to the output pixel data at a same time that the cluster controller stores input pixel data at row address IINPUT of the pixel memory, and
- wherein IOUTPUT equals IINPUT.
13 more elements
Dependencies are inferred from the claim text.