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US 12,517,700 B1Granted
Systolic array with output rounding for multiple source/destination data type pairs
AssigneeAmazon Technologies, Inc.
InventorsNishith Desai, Thomas A. Volpe, Thomas Elmer
Life of this patent
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Abstract
Systems and methods are provided to round the numbers produced by a systolic array. A rounder can obtain a number from the systolic array and identify a data type conversion associated with the number. The data type conversion may indicate a first bit-length and a second bit-length of the number. The rounder can select a random number generator for rounding the number based on the data type conversion. The bit-length of the random number generator may be equal to a difference in bit-length between the first bit-length and the second bit-length. The rounder can perform a rounding operation using a random number generated by the random number generator.
Claims20
A processor, comprising:
- a rounder configured to perform a set of stochastic rounding operations to stochastically round individual 32-bit values of a set of 32-bit values to result in a set of outputs with significands of a specified significand output bit-length from among a plurality of potential significand output bit-lengths, wherein individual stochastic rounding operations of the set of stochastic rounding operations rely on individual pseudo-random numbers of a set of pseudo-random numbers particular to the specified significand output bit-length, wherein the rounder further comprises:
- a plurality of maximal length linear feedback shift registers (LFSRs) comprising, for each given significand output bit-length of the plurality of potential significand output bit-lengths, a maximal length LFSR of a bit length equal to a difference in bit-length between bit-lengths of significands of the set of 32-bit values and the given significand output bit-length;
- and
- a random number generator selector configured to select a maximal length LFSR to utilize for the set of stochastic rounding operations based on the bit-length of the selected maximal length LFSR matching the difference in bit-length between the bit-lengths of the significands of the set of 32-bit values and the specified significand output bit-length.
1 more element
An integrated circuit comprising:
- a rounder configured to:
- receive a first number with a significand of a first bit-length;
- determine a selected second significand bit-length for the first number from a plurality of second significand bit-lengths;
- select a random number generator of a plurality of random number generators based on a bit-length of the random number generator matching a difference in bit-length between the first bit-length of the significand of the first number and the selected second significand bit-length, wherein the plurality of random number generators comprises, for each given second significand bit-length of the plurality of second significand bit-lengths, a respective random number generator of a bit-length equal to a difference in bit-length between the first bit-length of the significand of the first number and the given second significand bit-length;
- and
- perform a rounding operation to round the first number and generate a second number with the selected second significand bit-length based on a random number generated by the random number generator.
3 more elements
A method, comprising:
- receiving a first number with a significand of a first bit-length;
- determining a data type conversion associated with the first number from a plurality of data type conversions, wherein each of the plurality of data type conversions indicates a respective first significand bit-length and a respective second significand bit-length of a number, wherein the data type conversion indicates the first bit-length of the significand of the first number and a selected second significand bit-length of the first number;
- selecting a random number generator of a plurality of random number generators based on the data type conversion, wherein the plurality of random number generators comprises, for each of the plurality of data type conversions, a respective random number generator of a bit-length associated with the data type conversion, wherein a bit-length of the random number generator is equal to a difference in bit-length between the first bit-length of the significand of the first number and the selected second significand bit-length;
- and
- performing a rounding operation to round the first number based on a random number generated by the random number generator to result in a second number of the selected second significand bit-length.
2 more elements
Dependencies are inferred from the claim text.