Semiconductor cell and active area arrangement

A semiconductor device comprising:

• a first cell comprising:
• a first plurality of active areas that includes two or more p-type active areas and two or more n-type active areas;
• a metal over diffusion contact that extends over the two or more p-type active areas and the two or more n-type active areas and contacts at least two of the first plurality of active areas;
• and
• an insulating layer between the metal over diffusion contact and at least one other of the first plurality of active areas.

A method of manufacturing an integrated circuit comprising:

• forming a first cell structure adjacent a second cell structure in the integrated circuit;
• forming a first plurality of active areas including at least two p-type active areas and at least two n-type active areas in the first cell structure;
• and
• forming a second plurality of active areas including only one p-type active area and only one n-type active area in the second cell structure,
• wherein forming the first plurality of active areas and forming the second plurality of active areas includes forming each of the second plurality of active areas to be larger than each of the first plurality of active areas.