Method and system for repairing a dynamic random access memory (dram) of memory device

A system for repairing a Dynamic Random Access Memory (DRAM) memory device, the system comprising:

• DRAM memory;
• and
• at least one processor communicatively coupled to the DRAM memory, the at least one processor configured to:
• reserve a memory space within the DRAM memory, the reserved memory space including a plurality of spare rows, an amount of the plurality of spare rows set based on a Basic Input Output System (BIOS) boot menu setting associated with the DRAM memory;
• identify one or more faulty rows within the DRAM memory using at least one memory testing method;
• classify the identified one or more faulty rows into correctable faulty rows and uncorrectable faulty rows;
• and
• repair each of the classified correctable faulty rows by:
• updating an error information table based on information of a respective classified correctable faulty row, the error information table including an identifier corresponding to the respective classified correctable faulty row and an error count for the respective classified correctable faulty row,
• in response to the error count for the respective classified correctable faulty row exceeding a desired threshold value, mapping the respective classified correctable faulty row to an available spare row of the plurality of spare rows,
• storing the mapping of the respective classified correctable faulty row and the mapped spare row in a row repair translation table, and
• copying data stored in the respective classified correctable faulty row into the mapped spare row.

A non-transitory computer readable media for repairing a Dynamic Random Access Memory (DRAM) memory device, the non-transitory computer readable media comprising one or more computer readable instructions which, when executed by at least one processor, causes the at least one processor to:

• reserve a memory space within the DRAM memory device, the reserved memory space including a plurality of spare rows, an amount of the plurality of spare rows set based on a Basic Input Output System (BIOS) boot menu setting associated with the DRAM memory;
• identify one or more faulty rows within the DRAM memory device using at least one memory testing method;
• classify the identified one or more faulty rows into correctable faulty rows and uncorrectable faulty row;
• and
• repair each of the classified correctable faulty rows by,
• updating an error information table based on information of a respective classified correctable faulty row, the error information table including an identifier corresponding to the respective classified correctable faulty row and an error count for the respective classified correctable faulty row,
• in response to the error count for the respective classified correctable faulty row exceeding a desired threshold value, mapping the respective classified correctable faulty row with an available spare row of the plurality of spare rows,
• storing the mapping of the respective classified correctable faulty row and the mapped spare row in a row repair translation table, and
• copying data stored in the correctable faulty row into the mapped spare row.