Data transmission
AssigneeCirrus Logic, Inc.
InventorsNeil Whyte, Andy Brewster, Jens Puchert
Life of this patent
Estimating the term…
Abstract
A device, comprising: a main module; a plurality of secondary modules; and a data bus configured to enable data transmission between the main module and the plurality of secondary modules over a data line of the data bus; wherein each of the plurality of secondary modules is configured with a unique secondary address used by the main module to communicate with the respective secondary module over the data line, wherein the main module is operable to configure a first two or more of the plurality of secondary modules with a first common secondary address for simultaneous data transmission from the main module to the first two or more of the plurality of secondary modules over the data line.
Claims19
A device, comprising:
- a main module;
- a plurality of secondary modules;
- and
- a two-wire serial data bus comprising a data line and a clock line, the data bus configured to enable data transmission of data signals between the main module and the plurality of secondary modules over a data line of the data bus;
- wherein each of the plurality of secondary modules is configured with a unique address, the unique address used by the main module to communicate with the respective secondary module over the data line,
- wherein the main module is operable to configure a first two or more of the plurality of secondary modules with a first common address for simultaneous data transmission from the main module to the first two or more of the plurality of secondary modules over the data line.
A two-wire serial data bus comprising a data line and a clock line, the data bus configured to enable data transmission between a main module to a plurality of secondary modules over the data line,
- wherein each of the plurality of secondary modules is configured with a unique address used by the main module to communicate with the respective secondary module,
- wherein two or more of the plurality of secondary modules have a common address configurable by the main module for transmission of data simultaneously to the two or more of the plurality of secondary modules over the data line.
A main module configured to communication with a plurality of secondary modules via a two-wire serial data bus comprising a data line and a clock line;
- wherein the main module is configured to communicate with each of the plurality of secondary modules over the data line using a unique address associated with each respective secondary module,
- wherein the main module is operable to configure a first two or more of the plurality of secondary modules with a first common address for simultaneous data transmission from the main module to the first two or more of the plurality of secondary modules over the data line.
A secondary module configured to communicate with a main module via a two-wire serial data bus comprising a data line and a clock line,
- wherein the secondary module is configured with a unique address used by the main module to communicate with the secondary module,
- wherein the secondary module is configurable with a common address shared between the secondary module and one or more other secondary modules configured to communicate with the main module via the data bus,
- wherein the common address is configurable by the main module for transmission of data simultaneously to the secondary module and the one or more other secondary modules over the data line.
A method of data transmission over a two-wire serial data bus comprising a data line and a clock line, the data bus configured to enable data transmission between a main module and a plurality of secondary modules over the data line of the data bus, the method comprising:
- configuring each of the plurality of secondary modules with a unique address, the unique address used by the main module to communicate with the respective secondary module over the data line;
- and
- configuring, using respective unique addresses, a first two or more of the plurality of secondary modules with a first common address for simultaneous data transmission from the main module to the first two or more of the plurality of secondary modules over the data line.
Dependencies are inferred from the claim text.