Fast memory mapped IO support by register switch

A system comprising:

• a memory;
• and
• a processing device communicably coupled to the memory, the processing device to:
• configure, by a virtual machine, a first memory location to map to a virtual device and a second memory location to map to guest main memory;
• initiate, by the virtual machine, a fault that causes a hypervisor to perform a computing task for the virtual machine, wherein the fault is initiated by a first execution of an instruction referencing a register of a virtual processor, wherein the register comprises a pointer value to the first memory location and is updated after the fault to comprise the second memory location, wherein the first execution accesses the first memory location in response to which firmware causes the hypervisor to perform the computing task;
• and
• perform, by the virtual machine, a second execution of the instruction, wherein the second execution of the instruction accesses the second memory location without signaling the hypervisor to perform the task.

A non-transitory machine-readable storage medium storing instructions which, when executed, cause a processing device to perform operations comprising:

• identifying a first memory page mapped to a device and a second memory page mapped to main memory;
• configuring the first memory page to generate one or more page faults when accessed by a virtual machine;
• detecting, by firmware, a page fault caused by a first execution of an instruction of the virtual machine, wherein the instruction comprises a reference to a register comprising a pointer value to the first memory page;
• responsive to the detecting the page fault, causing the hypervisor to perform a computing task for the virtual machine;
• updating, by the firmware, the register to comprise a pointer value to the second memory page;
• and
• initiating a second execution of the instruction of the virtual machine, wherein the second execution of the instruction accesses the second memory page without signaling the hypervisor to perform the task.