Method of measuring chip characteristics, test device and non-transitory computer readable media

A test device, configured to test a chip, comprising:

• a power supply circuit, configured to output an operating voltage;
• a clock generating circuit, configured to output a system clock signal;
• and
• a calculating circuit, configured to perform:
• controlling the power supply circuit to output the operating voltage to the chip, wherein the chip comprises a plurality of oscillator circuits configured to generate a plurality of oscillating signals according to the operating voltage;
• testing the chip under a situation that the calculating circuit controls the clock generating circuit to output the system clock signal having a first clock period to the chip, comprising:
• controlling the power supply circuit to change the operating voltage sequentially until the chip changes from a normal state to a failure state, so as to generate a first boundary operating voltage;
• and
• recording the plurality of oscillating signals generated according to the first boundary operating voltage as first measurement data, wherein the first measurement data represents chip characteristics of the chip corresponding to the first clock period;
• testing the chip under a situation that the calculating circuit controls the clock generating circuit to output the system clock signal having a second clock period to the chip, comprising:
• controlling the power supply circuit to change the operating voltage sequentially until the chip changes from the normal state to the failure state, so as to generate a second boundary operating voltage;
• and
• recording the plurality of oscillating signals generated according to the second boundary operating voltage as second measurement data, wherein the second measurement data represents chip characteristics of the chip corresponding to the second clock period;
• and
• establishing a performance estimation function of the chip according to the first measurement data, the second measurement data, the first clock period and the second clock period, comprising:
• calculating a plurality of weights;
• wherein a sum of a plurality of first products, generated by respectively multiplying periods of the plurality of oscillating signals of the first measurement data by the plurality of weights, is equal to the first clock period,
• wherein a sum of a plurality of second products, generated by respectively multiplying periods of the plurality of oscillating signals of the second measurement data by the plurality of weights, is equal to the second clock period.

A non-transitory computer readable media, comprising a plurality of computer readable instructions, wherein the plurality of computer readable instructions, in response to being executed by a test device, make the test device perform following operations:

• outputting an operating voltage to a chip, wherein the chip comprises a plurality of oscillator circuits configured to generate a plurality of oscillating signals according to the operating voltage;
• testing the chip under a situation that the test device outputs a system clock signal having a first clock period to the chip, comprising:
• changing the operating voltage sequentially until the chip changes from a normal state to a failure state, so as to generate a first boundary operating voltage;
• and
• recording the plurality of oscillating signals generated according to the first boundary operating voltage as first measurement data, wherein the first measurement data represents chip characteristics of the chip corresponding to the first clock period;
• testing the chip under a situation that the test device outputs the system clock signal having a second clock period to the chip, comprising:
• changing the operating voltage sequentially until the chip changes from the normal state to the failure state, so as to generate a second boundary operating voltage;
• and
• recording the plurality of oscillating signals generated according to the second boundary operating voltage as second measurement data, wherein the second measurement data represents the chip characteristics of the chip corresponding to the second clock period;
• and
• establishing a performance estimation function of the chip according to the first measurement data, the second measurement data, the first clock period and the second clock period comprises:
• calculating a plurality of weights;
• wherein a sum of a plurality of first products, generated by respectively multiplying periods of the plurality of oscillating signals of the first measurement data by the plurality of weights, is equal to the first clock period,
• wherein a sum of a plurality of second products, generated by respectively multiplying periods of the plurality of oscillating signals of the second measurement data by the plurality of weights, is equal to the second clock period.