Voltage level detector performing state detection

A voltage level detector comprising:

• a voltage divider configured to receive a first voltage, which is an output voltage of a voltage regulator, and generate a first division voltage and a second division voltage based on the first voltage;
• a first switch comprising a first input terminal and a second input terminal configured to receive the first and second division voltages, respectively, and a first output terminal and a second output terminal configured to output, according to control of a clock signal, the first and second division voltages, respectively;
• a first comparator connected to one of the first and second output terminals of the first switch and configured to receive a reference voltage and output a first comparison signal;
• a second comparator connected to the other of the first and second output terminals of the first switch and configured to receive the reference voltage and output a second comparison signal;
• a second switch comprising a third input terminal and a fourth input terminal configured to receive the first and second comparison signals, respectively, and a third output terminal and a fourth output terminal configured to output, according to control of the clock signal, the first and second comparison signals, respectively;
• and
• a determination circuit configured to receive the first and second comparison signals and output a result signal indicating whether or not the voltage level detector is in a normal state.

A voltage level detector comprising:

• a voltage division circuit configured to generate a first division voltage and a second division voltage that are proportional to a first voltage received from outside;
• a comparison circuit configured to compare each of the first division voltage and the second division voltage with a reference voltage and output a first comparison signal and a second comparison signal;
• a determination circuit configured to generate a result signal based on the first and second comparison signals;
• and
• a switch circuit configured to convert a connection path between output terminals of the voltage division circuit and input terminals of the comparison circuit and convert a connection path between output terminals of the comparison circuit and input terminals of the determination circuit, according to control of a clock signal.