Back-end-of-line compatible physically unclonable function memory device and system
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Han Lin, Chia-En Huang
Life of this patent
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Abstract
A memory system includes a memory array comprising a plurality of memory cells. Each of the memory cells includes a transistor coupled to a first capacitor and a second capacitor in series, respectively. The memory system includes an authentication circuit operatively coupled to the memory array. The authentication circuit is configured to generate a Physically Unclonable Function (PUF) signature based on respective logic states of the plurality of memory cells, and wherein the logic state of each of the plurality of memory cells is determined based on a preceding breakdown of either the corresponding first capacitor or second capacitor.
Claims18
A semiconductor device, comprising:
- a gate dielectric layer;
- a first semiconductor film disposed on a first side of the gate dielectric layer;
- a first metal structure disposed on a second side of the gate dielectric layer opposite to the first side, wherein the first metal structure extends along a first lateral direction;
- a first conductive structure disposed on the first side over the first semiconductor film, wherein the first conductive structure extends along the first lateral direction to traverse across the first semiconductor film, and further extends along a vertical direction;
- a second conductive structure disposed on the first side over the first semiconductor film, wherein the second conductive structure extends along the vertical direction, and wherein the second conductive structure, the first semiconductor film, and a first dielectric film therebetween forms a first capacitor;
- and
- a third conductive structure disposed on the first side over the first semiconductor film, wherein the third conductive structure extends along the vertical direction, and wherein the third conductive structure, the first semiconductor film, and a second dielectric film therebetween forms a second capacitor.
A semiconductor device, comprising:
- a gate dielectric layer;
- a semiconductor film disposed on a first side of the gate dielectric layer;
- a gate terminal disposed on a second side of the gate dielectric layer opposite to the first side, wherein the gate terminal extends along a first lateral direction;
- a bit line disposed on the semiconductor film, extending along the first lateral direction to traverse across the semiconductor film, and further extending along a vertical direction;
- a first conductive terminal disposed on the first side of the semiconductor film, and extending along the vertical direction, wherein the first conductive terminal, the semiconductor film, and a first dielectric film therebetween forms a first capacitor;
- and
- a second conductive terminal disposed on the first side over the semiconductor film, and extending along the vertical direction, wherein the second conductive terminal, the semiconductor film, and a second dielectric film therebetween forms a second capacitor.
A memory system, comprising:
- a memory array comprising a plurality of memory cells, each including:
- a gate dielectric layer;
- a semiconductor film disposed on a first side of the gate dielectric layer;
- a gate terminal disposed on a second side of the gate dielectric layer opposite to the first side, and extending along a first lateral direction;
- a bit line disposed on the semiconductor film, extending along the first lateral direction to traverse across the semiconductor film, and further extending along a vertical direction;
- a first conductive terminal disposed on the first side of the semiconductor film, and extending along the vertical direction, wherein the first conductive terminal, the semiconductor film, and a first dielectric film therebetween forms a first capacitor;
- and
- a second conductive terminal disposed on the first side over the semiconductor film, and extending along the vertical direction, wherein the second conductive terminal, the semiconductor film, and a second dielectric film therebetween forms a second capacitor;
- and
- an authentication circuit operatively coupled to the memory array.
Dependencies are inferred from the claim text.