Semiconductor device including three-dimensional memory cells

A semiconductor device, comprising:

• a word line stack including a plurality of double word lines that are stacked over a substrate in a direction perpendicular to a surface of the substrate;
• word line pads that are laterally oriented between edge portions of each of the double word lines;
• a plurality of active layers disposed between the double word lines and laterally spaced apart from each other in a direction that the double word lines extend;
• a bit line commonly coupled to first end portions of the active layers and extending in a direction perpendicular to the surface of the substrate;
• and
• capacitors respectively coupled to the second end portions of the active layers.

A semiconductor device, comprising:

• a plurality of double conductive lines stacked over a substrate, each double conductive line including a pair of first conductive lines facing each other;
• a plurality of conductive line pads, each conductive line pad being disposed between a respective pair of the first conductive lines at edge portions of each of the double conductive lines;
• a plurality of contact plugs contacting the edge portions of the double conductive lines, respectively;
• a plurality of active layers disposed between the double conductive lines, respectively, and laterally spaced apart from each other in a direction that the double conductive lines are stacked;
• a second conductive line commonly coupled to first end portions of the active layers and extending in a direction perpendicular to the surface of the substrate;
• and
• a plurality of capacitors respectively coupled to second end portions of the active layers.