Tiled compute and programmable logic array
AssigneeXilinx, Inc.
InventorsBrian C. Gaide, Sneha Bhalchandra Date, Juan J. Noguera Serra
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Abstract
Examples herein describe a three-dimensional (3D) die stack. The 3D die stack includes a programmable logic (PL) die and a compute die stacked on top of the PL die. The PL die includes a plurality of configurable blocks and a plurality of first electrical connections on a top side of the PL die. The compute die includes a plurality of data processing engines and a plurality of second electrical connections on a bottom side of the compute die. The three-dimensional die stack includes a plurality of tiles, each tile comprising M configurable blocks included in the plurality of configurable blocks and N data processing engines included in the plurality of data processing engines.
Claims18
A three-dimensional (3D) die stack, comprising:
- a programmable logic (PL) die comprising a plurality of configurable blocks and a plurality of first electrical connections on a top side of the PL die;
- and
- a compute die stacked on top of the PL die, the compute die comprising a plurality of data processing engines and a plurality of second electrical connections on a bottom side of the compute die,
- wherein each configurable block included in the plurality of configurable blocks comprises a programmable interconnect, and each data processing engine included in the plurality of data processing engines is electronically connected to substantially the same number of programmable interconnects included in the plurality of configurable blocks, and
- wherein the three-dimensional die stack includes a plurality of tiles, each tile comprising M configurable blocks included in the plurality of configurable blocks and N data processing engines included in the plurality of data processing engines.
A computing system, comprising:
- a memory;
- and
- a three-dimensional (3D) die stack coupled to the memory and comprising:
- a programmable logic (PL) die comprising a plurality of configurable blocks and a plurality of first electrical connections on a top side of the PL die;
- and
- a compute die stacked on top of the PL die, the compute die comprising a plurality of data processing engines and a plurality of second electrical connections on a bottom side of the compute die,
- wherein each configurable block included in the plurality of configurable blocks comprises a programmable interconnect, and each data processing engine included in the plurality of data processing engines is electronically connected to substantially the same number of programmable interconnects included in the plurality of configurable blocks, and
- wherein the three-dimensional die stack includes a plurality of tiles, each tile comprising M configurable blocks included in the plurality of configurable blocks and N data processing engines included in the plurality of data processing engines.
Dependencies are inferred from the claim text.