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US 12,501,841 B2Granted
High density interconnects for arrays of Josephson traveling wave parametric devices
AssigneeInternational Business Machines Corporation
InventorsCorrado P. Mancini, David Lokken-Toyli
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Abstract
A superconducting electrical device includes one or more traveling-wave parametric amplifiers (TWPAs) on a chip that is electrically connected to a wiring layer of a substrate. The electrical connection of the chip to the wiring layer of the substrate includes, for each of the one or more TWPAs, a signal bump-bond between the TWPA and the substrate. There is a peripheral ring of ground bumps around the signal bump between the TWPA and the substrate.
Claims20
A superconducting electrical device, comprising:
- a substrate;
- and
- a chip comprising a group of Josephson junction traveling-wave parametric circuits (JJTWPCs),
- wherein each JJTWPC comprises an input port and an output port,
- wherein the substrate comprises, for each JJTWPC, a respective pair of an input signal pad and an output signal pad that corresponds to the input port and the output port of the JJTWPC, wherein the input signal pad and the output signal pad of the respective pair have a signal pad size to gap ratio and respective signal pad tapers that provide an impedance match between the input port and the output port of the JJTWPC, and
- wherein an electrical connection of the chip to a wiring layer of the substrate comprises, for each of the JJTWPCs:
- a respective signal bump-bond between the input port and the output port of the JJTWPC and the corresponding respective pair of the input signal pad and the output signal pad of the substrate, and
- a respective peripheral ring of ground bumps around the respective signal bump between the JJTWPC and the substrate.
5 more elements
A method, comprising:
- providing a substrate;
- providing a chip comprising a group of Josephson junction traveling-wave parametric circuits (JJTWPCs),
- wherein each JJTWPC comprises an input port and an output port, and
- wherein the substrate comprises, for each JJTWPC, a respective pair of an input signal pad and an output signal pad that corresponds to the input port and the output port of the JJTWPC, wherein the input signal pad and the output signal pad of the respective pair have a signal pad size to gap ratio and respective signal pad tapers that provide an impedance match between the input port and the output port of the JJTWPC;
- and
- electrically connecting the JJTWPCs to a wiring layer of the substrate, comprising, for each of the JJTWPCs:
- providing a respective signal bump-bond between the input port and the output port of the JJTWPC and the corresponding respective pair of the input signal pad and the output signal pad of the substrate, and
- providing a respective peripheral ring of ground bumps around the respective signal bump between the JJTWPC and the substrate.
5 more elements
Dependencies are inferred from the claim text.