Integrator and delta-sigma modulator

A delta-sigma modulator which has an AD conversion period and a reset period, and determines an output by a first period and a second period in the AD conversion period, the delta-sigma modulator comprising:

• an integrator which has
• a first order delay unit which outputs an output signal obtained by delaying a signal in accordance with an input signal,
• a first feedback unit which generates a first feedback signal in accordance with the output signal,
• a second feedback unit which generates a second feedback signal in accordance with the output signal, and
• an addition and subtraction unit which adds and subtracts the first feedback signal and the second feedback signal, respectively, to and from the input signal, for an input to the delay unit;
• an analog-to-digital converter which converts the output signal into a digital signal;
• a digital-to-analog converter which generates a feedback signal in accordance with an output of the analog-to-digital converter, for a subtraction from the input signal;
• and
• a control unit which causes the second feedback unit to operate as a delay circuit during the first period, and causes the second feedback unit to operate as a gain circuit having a gain smaller than 0 during the second period.