Compensation device and method for excess loop delay using time division switching technique

A delta-sigma modulator, comprising:

• a loop filter compensating for excess loop delay and having a signal transfer characteristic satisfying a third-order transfer function, and configured to integrate a difference between an input signal and an analog signal for output;
• a quantizer configured to quantize a signal output from the loop filter for output;
• and
• a digital-to-analog converter (DAC) configured to perform digital-to-analog conversion on a signal output from the quantizer to output the analog signal,
• wherein the loop filter comprises:
• an operational amplifier;
• a plurality of capacitors connected to each other in series between an input terminal and an output terminal of the operational amplifier;
• and
• a plurality of resistor units connected in common to one among nodes between the plurality of capacitors,
• wherein at least two of the plurality of resistor units have respective resistance values changed according to a clock signal,
• wherein each of the two resistor units comprises:
• a plurality of resistors;
• and
• a switch connected to at least one of the plurality of resistors, and configured to determine the resistance value based on the clock signal.

A communication terminal comprising a delta-sigma modulator capable of compensating for excess loop delay by using a time division switching technique,

• wherein the delta-sigma modulator comprises a loop filter compensating for the excess loop delay and having a signal transfer characteristic satisfying a third-order transfer function,
• wherein the loop filter comprises:
• an operational amplifier;
• a plurality of capacitors connected to each other in series between an input terminal and an output terminal of the operational amplifier;
• and
• a plurality of resistor units connected in common to one among nodes between the plurality of capacitors,
• wherein at least two of the plurality of resistor units have respective resistance values changed according to a clock signal,
• wherein each of the two resistor units comprises:
• a plurality of resistors;
• and
• a switch connected to at least one of the plurality of resistors, and configured to determine the resistance value based on the clock signal.