Logic gate device

Optoelectronic system comprising a logic gate device, the logic gate device comprising

• a probe structure having an interface contact;
• and
• a first logic input for receiving a first light pulse having a first carrier-envelope phase φ_A that encodes an input state of the first logic input and a second logic input for receiving a second light pulse having a second carrier-envelope phase φ_B that encodes an input state of the second logic input,
• wherein the probe structure is arranged to be irradiated by the first light pulse in a first interaction region to generate a first current component within the probe structure that depends on the first carrier-envelope phase φ_A,
• wherein the probe structure is arranged to be irradiated by the second light pulse in a second interaction region to generate a second current component within the probe structure that depends on the second carrier-envelope phase φ_B,
• wherein the interface contact is arranged to output a sum current that comprises the first and second current components,
• wherein the sum current encodes a logic output state of a logic output of the logic gate device, the optoelectronic system further comprising
• a first light source for generating the first light pulse and a second light source for generating the second light pulse, and
• a control device for controlling the first and second light source, and wherein the control device is configured to control the first light source to generate the first carrier-envelope phase φ_A in dependence on the input state of the first logic input and to control the second light source to generate the second carrier-envelope phase φ_B in dependence on the input state of the second logic input.

Method for implementing a logic gate, the method comprising:

• providing a first light pulse having a first carrier-envelope phase at a first logic input of a logic gate device, the first carrier-envelope phase encoding an input state of the first logic input;
• providing a second light pulse having a second carrier-envelope phase at a second logic input of the logic gate device, the second carrier-envelope phase encoding an input state of the second logic input;
• irradiating a probe structure of the logic gate device with the first light pulse in a first interaction region to generate a first current component within the probe structure that depends on the first carrier-envelope phase;
• irradiating the probe structure with the second light pulse in a second interaction region to generate a second current component within the probe structure that depends on the second carrier-envelope phase;
• and
• outputting a sum current via an interface contact of the probe structure, the sum current comprising the first and second current components, wherein the sum current encodes a logic output state of a logic output of the logic gate device.