Control register related computing system and method

A method comprising:

• checking redundancy in a first status register unit of a first processing complex and a second status register unit of a second processing complex;
• storing control register data and an error correction code (ECC) associated with the control register data in control registers of a control register unit;
• responsive to a read of a selected control register of the control registers, validating the control register data associated with the selected control register based on the ECC associated with the control register data;
• and
• reading the control registers at a predetermined frequency to trigger the validating of the control register data.

A computing system, comprising:

• a first processing complex including a first status register unit comprising first status registers;
• a second processing complex including a second status register unit comprising second status registers;
• a lockstep unit configured to check redundancy in the first status registers and the second status registers;
• a control register unit connected to the lockstep unit and comprising control registers;
• and
• a scrubber configured to read the first status registers, the second status registers, and the control registers at a predetermined frequency, wherein:
• the control registers are provided with end-to-end error correction code (ECC) protection triggered by the scrubber to validate control register data associated with one or more of the control registers at the predetermined frequency.