Method and structure to incorporate multiple low loss photonic circuit components

A method comprising:

• fabricating a first wafer that includes:
• a first substrate;
• a first plurality of oxide layers on the first substrate;
• silicon nitride (SiN) waveguides in the first plurality of oxide layers;
• and
• a superconductive nanowire single photon detector (SNSPD) in the first plurality of oxide layers;
• fabricating a second wafer that includes:
• a second substrate;
• a second plurality of oxide layers on the second substrate;
• and
• a Pockels effect optical phase shifter in the second plurality of oxide layers;
• bonding the first plurality of oxide layers to the second plurality of oxide layers;
• removing the second substrate;
• forming electrical connectors in the second plurality of oxide layers and the first plurality of oxide layers;
• forming an undercut region in the first substrate;
• and
• forming, on the second plurality of oxide layers,
• a third plurality of oxide layers;
• and
• one or more metal layers in the third plurality of oxide layers, the one or more metal layers in electrical connection with the electrical connectors.

A system on a semiconductor substrate, the system comprising:

• a plurality of heralded photon sources, each heralded photon source of the plurality of heralded photon sources including a first output and a second output;
• a plurality of delay lines, each delay line of the plurality of delay lines optically coupled to the first output of a respective heralded photon source of the plurality of heralded photon sources;
• a plurality of single photon detectors, each single photon detector of the plurality of single photon detectors optically coupled to the second output of a respective heralded photon source of the plurality heralded photon sources;
• and
• a switch network comprising:
• a first crossing network including a first set of input ports and a first set of output ports, each input port of the first set of input ports optically coupled to an output of a respective delay line of the plurality of delay lines;
• a second crossing network including a second set of input ports and at least one output port;
• and
• a plurality of phase shifters between the first crossing network and the second crossing network, each phase shifter of the plurality of phase shifters optically coupling an output port of the first set of output ports of the first crossing network to an input port of the second set of input ports of the second crossing network.