Transparent display apparatus having a first block portion including a dummy pattern

A transparent display apparatus comprising:

• a substrate including a display area and a non-display area near the display area;
• a plurality of pixels disposed in the display area, each pixel including a first transmissive portion and a plurality of subpixels;
• and
• a plurality of gate-driver-in-panel (GIP) portions disposed in the non-display area on the substrate, the GIP portions each including a second transmissive portion and a plurality of block portions,
• wherein:
• the plurality of subpixels include a first subpixel, the first subpixel including at least three pixel conductive layers that overlap one another,
• the plurality of block portions include a first block portion disposed at a position corresponding to a position of the first subpixel in the pixel, and
• the first block portion includes at least three non-pixel conductive layers disposed on same layers as the at least three pixel conductive layers, respectively, the at least three non-pixel conductive layers overlap one another.

A transparent display apparatus comprising:

• a substrate including a display area and a non-display area adjacent to the display area;
• a plurality of pixels disposed in the display area, each pixel including a first transmissive portion and a plurality of subpixels;
• and
• a plurality of gate-driver-in-panel (GIP) portions disposed in the non-display area, each GIP portion including a second transmissive portion and a plurality of block portions,
• wherein:
• the display area includes a common voltage line;
• a subpixel of the plurality of subpixels includes a transistor, a gate electrode and a source or drain electrode of the transistor overlapping the common voltage line;
• and
• the plurality of block portions include a dummy pattern having a first conductive layer, a second conductive layer, and a third conductive layer, the first conductive layer being in a same layer as the common voltage line, the second conductive layer being in a same layer as the gate electrode, the third conductive layer being in a same layer as at least one of the source or drain electrode, and the second and third conductive layers overlapping the first conductive layer.