Monolithic integration of diverse device types with shared electrical isolation

A structure comprising:

• a substrate including a device layer, a handle substrate, and a buried insulator layer between the handle substrate and the device layer, the device layer comprising single-crystal silicon;
• a semiconductor layer on the device layer in a first device region, the semiconductor layer comprising a III-V compound semiconductor material, and the semiconductor layer having a first top surface;
• a first device structure including a gate structure on the semiconductor layer;
• a second device structure including a first doped region in the device layer in a second device region, the first doped region and the device layer defining a first p-n junction;
• and
• a dielectric layer on the device layer in the second device region, the dielectric layer having a second top surface, and the dielectric layer including a first trench that extends from the second top surface to the device layer at a location of the first doped region in the device layer.