Interface circuit allowing differential and non-differential signaling on one bus
AssigneeEndress + Hauser GmbH + Co. KG
InventorGautham Karnik
Life of this patent
Estimating the term…
Abstract
An interface circuit enabling communication via a differential transceiver with both differential signaling and non-differential signaling field devices connected to the same bus includes switches and control logic to enable differential signaling on the bus in a first mode and non-differential signaling on the bus in a second mode. In the second mode of non-differential signaling, the differential conductors of the bus are held at the same potential. Further in the second mode of non-differential signaling, a differential signal is created within the interface circuit from one signal of the bus and provided to the differential transceiver.
Claims8
A serial communication interface circuit, comprising:
- a first D+ terminal and a first D− terminal forming a first differential signal input/output (I/O);
- a second D+ terminal and a second D− terminal forming a second differential signal I/O;
- an input voltage (VCC) terminal and a ground (GND) terminal;
- a differential mode enable input;
- a transmit enable input;
- a first single-pole, single-throw (SPST) switch and a pull-up resistor, wherein the first SPST switch is configured to connect the second D+ terminal to the VCC terminal via the pull-up resistor when the first SPST switch is closed;
- a second SPST switch and a pull-down resistor, wherein the second SPST switch is configured to connect the second D− terminal to the GND terminal via the pull-down resistor when the second SPST switch is closed;
- a termination resistor configured to connect the second D+ terminal to the second D− terminal via the termination resistor;
- a third SPST switch connected in parallel with the termination resistor and configured to connect the second D+ terminal to the second D− terminal when the third SPST switch is closed;
- a fourth SPST switch configured to internally disconnect the first D+ terminal when the fourth SPST switch is open;
- a first inverter configured to invert a D− signal of the second D− terminal;
- a single-pole, double-throw (SPDT) switch configured to connect the first D+ terminal from the fourth SPST switch to either the second D+ terminal or to the inverted D− signal from the first inverter;
- and
- switch control logic configured to control the first, second, third, and fourth SPST switches and additionally the SPDT switch.
A data acquisition unit, comprising:
- a microcontroller including a receive data (RX) input, and transmit data (TX) output, a TX/nRX enable output, and a differential mode enable output;
- a differential transceiver including a received data output connected with the RX input of the microcontroller;
- a transmit data input connected with the TX output of the microcontroller;
- TX/nRX enable input connected with the TX/nRX enable output of the microcontroller;
- and a differential signal input/output (I/O) including a D+ terminal and a D− terminal;
- and
- a serial communication interface circuit, including:
- a first D+ terminal and a first D− terminal forming a first differential signal input/output (I/O);
- a second D+ terminal and a second D− terminal forming a second differential signal I/O;
- an input voltage (VCC) terminal and a ground (GND) terminal;
- a differential mode enable input;
- a transmit enable input;
- a first single-pole, single-throw (SPST) switch and a pull-up resistor, wherein the first SPST switch is configured to connect the second D+ terminal to the VCC terminal via the pull-up resistor when the first SPST switch is closed;
- a second SPST switch and a pull-down resistor, wherein the second SPST switch is configured to connect the second D− terminal to the GND terminal via the pull-down resistor when the second SPST switch is closed;
- a termination resistor configured to connect the second D+ terminal to the second D− terminal via the termination resistor;
- a third SPST switch connected in parallel with the termination resistor and configured to connect the second D+ terminal to the second D− terminal when the third SPST switch is closed;
- a fourth SPST switch configured to internally disconnect the first D+ terminal when the fourth SPST switch is open;
- a first inverter configured to invert a D− signal of the second D− terminal;
- a single-pole, double-throw (SPDT) switch configured to connect the first D+ terminal from the fourth SPST switch to either the second D+ terminal or to the inverted D− signal from the first inverter;
- and
- switch control logic configured to control the first, second, third, and fourth SPST switches and additionally the SPDT switch,
- wherein:
- the first D+ terminal of the serial communication interface circuit is connected with the D+ terminal of the differential transceiver;
- the first D− terminal of the serial communication interface circuit is connected with the D− terminal of the differential transceiver;
- the differential mode enable input of the serial communication interface circuit is connected with the differential mode enable output of the microcontroller;
- and
- the transmit enable input of the serial communication interface circuit is connected with the TX/nRX enable output of the microcontroller.
A field device network, comprising:
- a data acquisition unit, including:
- a microcontroller including a receive data (RX) input, and transmit data (TX) output, a TX/nRX enable output, and a differential mode enable output;
- a differential transceiver including a received data output connected with the RX input of the microcontroller;
- a transmit data input connected with the TX output of the microcontroller;
- TX/nRX enable input connected with the TX/nRX enable output of the microcontroller;
- and a differential signal input/output (I/O) including a D+ terminal and a D− terminal;
- and
- a serial communication interface circuit, including:
- a first D+ terminal and a first D− terminal forming a first differential signal input/output (I/O);
- a second D+ terminal and a second D− terminal forming a second differential signal I/O;
- an input voltage (VCC) terminal and a ground (GND) terminal;
- a differential mode enable input;
- a transmit enable input;
- a first single-pole, single-throw (SPST) switch and a pull-up resistor, wherein the first SPST switch is configured to connect the second D+ terminal to the VCC terminal via the pull-up resistor when the first SPST switch is closed;
- a second SPST switch and a pull-down resistor, wherein the second SPST switch is configured to connect the second D− terminal to the GND terminal via the pull-down resistor when the second SPST switch is closed;
- a termination resistor configured to connect the second D+ terminal to the second D− terminal via the termination resistor;
- a third SPST switch connected in parallel with the termination resistor and configured to connect the second D+ terminal to the second D− terminal when the third SPST switch is closed;
- a fourth SPST switch configured to internally disconnect the first D+ terminal when the fourth SPST switch is open;
- a first inverter configured to invert a D− signal of the second D− terminal;
- a single-pole, double-throw (SPDT) switch configured to connect the first D+ terminal from the fourth SPST switch to either the second D+ terminal or to the inverted D− signal from the first inverter;
- and
- switch control logic configured to control the first, second, third, and fourth SPST switches and additionally the SPDT switch,
- wherein:
- the first D+ terminal of the serial communication interface circuit is connected with the D+ terminal of the differential transceiver;
- the first D− terminal of the serial communication interface circuit is connected with the D− terminal of the differential transceiver;
- the differential mode enable input of the serial communication interface circuit is connected with the differential mode enable output of the microcontroller;
- and
- the transmit enable input of the serial communication interface circuit is connected with the TX/nRX enable output of the microcontroller;
- a bus having a voltage supply (VCC) conductor, a ground (GND) conductor, a D+ conductor, and a D− conductor;
- a first field device having a differential I/O having an D+ terminal connected with the D+ conductor bus and a D− terminal connected with the D− conductor of the bus;
- and
- a second field device having a non-differential serial I/O, wherein the non-differential serial I/O is connected with the D− conductor of the bus.
Dependencies are inferred from the claim text.