Analog-to-digital converter (ADC) having selective comparator offset error tracking and related corrections

An analog-to-digital (ADC) comprising:

• a first comparator circuitry configured to receive an analog signal modified by a PRBS (pseudorandom binary sequence) value, the first comparator circuitry configured to generate first comparison results on comparing the analog signal with multiple reference thresholds;
• a second comparator circuitry configured to receive the analog signal modified by the PRBS (pseudorandom binary sequence) value, the second comparator circuitry configured to generate second comparison results on comparing the analog signal with multiple reference thresholds;
• and
• a calibration circuitry coupled to the first and the second comparator circuitry, the calibration circuitry configured to generate an offset calibration signal based on the first and the second comparison results, the offset calibration signal configured to modify one or more parameters of at least one comparator in the first comparator circuitry and the second comparator circuitry.

A circuit comprising:

• a first ADC, the first ADC further including:
• a first comparator circuitry having an input and an output, the first comparator circuitry configured to receive an analog signal at the input;
• a first folding circuit having an input and an output, the input of the first folding circuit coupled to the output of the first comparator circuitry;
• and
• a first digital circuitry having an input and an output, the input of the first digital circuitry is coupled to the output of the first folding circuit;
• a second ADC, the first ADC further including:
• a second comparator circuitry having a first input, a second input and an output, the second comparator circuitry configured to receive the analog signal at the first input;
• a second folding circuit having an input and an output, the input of the second folding circuit coupled to the output of the second comparator circuitry;
• and
• a second digital circuitry having an input and an output, the input of the second digital circuitry is coupled to the output of the second folding circuit;
• and
• a calibration circuitry having a first input, a second input and an output, the first input of the calibration circuitry coupled to the output of the first digital circuitry, the second input of the calibration circuitry coupled to the output of the second digital circuitry and the output of the calibration circuitry coupled to the second input of the second comparator circuitry.