Bias circuit and power amplifier

A bias circuit, for providing a plurality of bias voltages for an amplification circuit, wherein the amplification circuit comprises a first differential amplification module and a second differential amplification module, and the first differential amplification module and the second differential amplification module are complementarily stacked;

• wherein the bias circuit comprises:
• a feedback module, a first bias module comprising a plurality of transistors, and a second bias module comprising a plurality of transistors;
• wherein a first input of the feedback module is connected to an output of the amplification circuit to receive an output common mode voltage, a second input of the feedback module is connected to a reference voltage, and outputs of the feedback module are connected to gates of main amplification transistors in the first differential amplification module;
• wherein based on a difference between the output common mode voltage and the reference voltage, the feedback module adjusts gate voltages at the gates of the main amplification transistors in the first differential implication module until the output common mode voltage is equal to the reference voltage;
• wherein the first bias module provides a corresponding bias voltage for each transistor in the first differential amplification module other than the main amplification transistors;
• wherein the second bias module provides a corresponding bias voltage for each transistor in the second differential amplification module;
• wherein each transistor in the first differential amplification module is an N-metal-oxide-semiconductor (NMOS) transistor, and each transistor in the second differential amplification module is a P-metal-oxide-semiconductor (PMOS) transistor;
• or each transistor in the first differential amplification module is a PMOS transistor, and each transistor in the second differential amplification module is an NMOS transistor.