Flash memory for performing margin read test operation and margin read test system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsGyuseong Kim, Hyun-Jin Shin
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorsGyuseong Kim, Hyun-Jin Shin
Estimating the term…
A flash memory includes a first memory cell connected with a selected word line and a first bit line, a second memory cell connected with the selected word line and a second bit line, a sense amplifier that provides a sensing line with a sensing current for sensing data stored in the first memory cell or the second memory cell, a bit line selection circuit that selects a bit line by connecting the sensing line with the first bit line or the second bit line, and a margin read test circuit that performs a margin read test operation in which the margin read test circuit provides the sensing line with a margin current for testing a read margin of the data stored in the first memory cell or the second memory cell that is connected to the selected bit line.
A flash memory comprising:
A margin read test system comprising:
A margin read test system comprising:
Dependencies are inferred from the claim text.