Back to results
US 12,494,244 B2Granted
Memory device and refresh method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorJongpil Son
Life of this patent
Estimating the term…
Abstract
A memory device is provided. The memory device includes: a first memory cell array including a first row and a second row; and a self-refresh circuit configured to control refresh in response to a first self-refresh entry signal, and stop refresh of the second row after refreshing the first row in response to a self-refresh exit signal.
Claims19
A memory device comprising:
- a first memory cell array comprising a plurality of rows, the plurality of rows comprising a first row and a second row;
- and
- a self-refresh circuit configured to control refresh in response to a first self-refresh entry signal, and stop refresh of the second row after refreshing the first row in response to a self-refresh exit signal,
- wherein the self-refresh circuit is configured to output a refresh row address in a first period of a self-refresh control signal and output a row hammer address in a second period of the self-refresh control signal, and
- wherein the self-refresh control signal is maintained at an enable level for a period comprising the first period and the second period.
2 more elements
A memory device comprising:
- a command decode circuit configured to decode a command, and output a self-refresh entry signal and a self-refresh exit signal;
- a self-refresh circuit configured to output a self-refresh control signal and a refresh row address in response to the self-refresh entry signal, and stop output of the self-refresh control signal and the refresh row address in response to the self-refresh exit signal;
- and
- a row address multiplexer configured to output the refresh row address in response to a high level of the self-refresh control signal, and output an operation row address in response to a low level of the self-refresh control signal,
- wherein the self-refresh circuit is configured to output the refresh row address as the refresh row address in a first period of the self-refresh control signal and output a row hammer address as the refresh row address in a second period of the self-refresh control signal,
- wherein the self-refresh control signal is maintained at an enable level for a period comprising the first period and the second period,
- wherein the refresh row address indicates a row to be refreshed, and
- wherein the operation row address indicates a row to be written to, read from, or erased.
5 more elements
Dependencies are inferred from the claim text.