Adaptive biasing procedure to increase PA efficiency in RFID readers

An assembly comprising:

• a power amplifier;
• a transceiver;
• one or more processors;
• and
• one or more memories communicatively coupled to the one or more processors storing instructions that, when executed by the one or more processors, cause the assembly to:
• transmit, by the transceiver, a first signal to a receiver device during a first time period while the power amplifier is biased at a first bias setting,
• adjust, by a power control algorithm during a second time period that is different than the first time period, the first bias setting to a second bias setting that is different from the first bias setting,
• transmit, by the transceiver, a second signal to the receiver device during the second time period while the power amplifier is biased at the second bias setting,
• responsive to transmitting the second signal to the receiver device, adjust, by the power control algorithm during a third time period that is different than the first time period and the second time period, the second bias setting to the first bias setting,
• transmit, by the transceiver, a third signal to the receiver device during the third time period while the power amplifier is biased at the first bias setting, and
• responsive to completing transmission of the third signal to the receiver device, adjust, by the power control algorithm during a fourth time period that is different than the first time period, the second time period, and the third time period, the first bias setting to the second bias setting, wherein the first signal is a modulated continuous waveform and the second signal is an unmodulated continuous waveform.