Control register for storing instruction size information
AssigneeApple Inc.
InventorsOmer Lichter, Alon Yaakov, Nadav Malki
Life of this patent
Estimating the term…
Abstract
A processor circuit that includes a plurality of register circuits and an event handler circuit is disclosed. The event handler circuit may detect a processing event that causes the processor circuit to halt execution of a current instruction and transfer control to a kernel. In response to a detection of the processing event, the event handler circuit may store a program counter value corresponding to the current instruction, information indicative of a cause of the processing event, and a size of the current instruction in corresponding register circuits of the plurality of register circuits.
Claims20
An apparatus, comprising:
- a processor circuit including:
- a plurality of register circuits;
- and
- an event handler circuit configured to:
- detect a processing event that causes the processor circuit to halt execution of a current instruction and transfer control to a kernel;
- in response to a detection of the processing event:
- store a program counter value corresponding to the current instruction in a counter register circuit of the plurality of register circuits;
- store information indicative of a cause of the processing event in a type register circuit of the plurality of register circuits;
- and
- store a size of the current instruction in a size register circuit of the plurality of register circuits.
A method, comprising:
- detecting a processing event in a processor circuit, wherein the processing event causes the processor circuit to transfer control from a current instruction to a kernel;
- in response to detecting the processing event:
- storing, in a counter register circuit included in the processor circuit, a program counter value corresponding to the current instruction;
- storing, in a type register circuit included in the processor circuit, information indicative of a cause of the processing event;
- and
- storing, in a size register circuit included in the processor circuit, a size of the current instruction.
An apparatus, comprising:
- a memory circuit configured to store a plurality of instructions;
- a processor circuit configured to:
- fetch one or more instructions of the plurality of instructions from the memory circuit;
- execute the one or more instructions;
- detect a processing event in the processor circuit;
- in response to a detection of the processing event:
- transfer control to a kernel from a current instruction;
- store a program counter value corresponding to the current instruction;
- store information indicative of a cause of the processing event;
- and
- store a size of the current instruction.
Dependencies are inferred from the claim text.