Semiconductor device and method of fabricating the same
AssigneeTaiwan Semiconductor Manufacuturing Company, Ltd.
InventorsKen-Ichi Goto, Cheng-Yi Wu
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Abstract
A semiconductor device includes a substrate, and a first transistor disposed on the substrate. The first transistor includes a first channel layer, a magnesium oxide layer, a first gate electrode, a first gate dielectric and first source/drain electrodes. A crystal orientation of the first channel layer is <100> or <110>. The magnesium oxide layer is located below the first channel layer and in contact with the first channel layer. The first gate electrode is located over the first channel layer. The first gate dielectric is located in between the first channel layer and the first gate electrode. The first source/drain electrodes are disposed on the first channel layer.
Claims20
A semiconductor device, comprising:
- a substrate;
- a first transistor disposed on the substrate, wherein the first transistor comprises:
- a first channel layer, wherein a crystal orientation of the first channel layer is <100> or <110>;
- a magnesium oxide layer located below the first channel layer and in contact with the first channel layer;
- a first gate electrode located over the first channel layer;
- a first gate dielectric located in between the first channel layer and the first gate electrode;
- and
- first source/drain electrodes disposed on the first channel layer;
- and
- a second transistor disposed on the substrate, wherein the second transistor comprises:
- a second channel layer, wherein the second channel layer comprises indium-gallium-zinc-oxide (IGZO);
- second source/drain electrodes disposed on the second channel layer;
- a second gate electrode disposed on the second channel layer;
- and
- a second gate dielectric located in between the second channel layer and the second gate electrode.
A semiconductor device, comprising:
- a substrate;
- an interconnection structure disposed on the substrate, wherein the interconnection structure comprises:
- a plurality of dielectric layers and a plurality of conductive layers alternately stacked;
- a plurality of p-type transistors embedded in the plurality of dielectric layers, wherein the plurality of p-type transistors comprises a crystalline channel layer, and a magnesium oxide layer located below the crystalline channel layer;
- a plurality of n-type transistors embedded in the plurality of dielectric layers, wherein the plurality of n-type transistors comprises an amorphous channel layer;
- and
- a plurality of conductive terminals disposed on and electrically connected to the interconnection structure.
A method of forming a semiconductor device, comprising:
- forming a first transistor on a substrate, wherein the first transistor is formed by:
- forming a magnesium oxide layer on the substrate;
- forming a first channel layer on the substrate, wherein the magnesium oxide layer is located below the first channel layer and in contact with the first channel layer, and a crystal orientation of the first channel layer is <100> or <110>;
- forming a first gate electrode over the first channel layer;
- forming a first gate dielectric in between the first channel layer and the first gate electrode;
- and
- forming first source/drain electrodes on the first channel layer;
- and
- forming a second transistor on the substrate, wherein the second transistor is formed by:
- forming a second channel layer, wherein the second channel layer comprises indium-gallium-zinc-oxide (IGZO);
- forming second source/drain electrodes disposed on the second channel layer;
- forming a second gate electrode disposed on the second channel layer;
- and
- forming a second gate dielectric in between the second channel layer and the second gate electrode.
Dependencies are inferred from the claim text.