Method and apparatus for integration-based timing recovery
AssigneeSamsung Electronics Co., Ltd.
InventorTianyu Wang
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Abstract
A method and an apparatus are provided in which at least one data slicer of a receiver samples a signal based on a clock sampling position to obtain a first data sample and a second data sample. An integrator of the receiver integrates the signal from the first data sample to the second data sample to generate an integrated voltage. A first data slicer of the receiver samples the integrated voltage at a time of the second data sample to obtain an integrated sample. A phase detector of the receiver determines whether the clock sampling position requires adjustment based on a sign of the integrated sample.
Claims20
A method comprising:
- sampling, by at least one data slicer of a receiver, a signal based on a clock sampling position to obtain a first data sample and a second data sample;
- integrating, at an integrator of the receiver, the signal from the first data sample to the second data sample to generate an integrated voltage;
- sampling, by a first data slicer of the receiver, the integrated voltage at a time of the second data sample to obtain an integrated sample;
- and
- determining, by a phase detector of the receiver, whether the clock sampling position requires adjustment based on a sign of the integrated sample.
An apparatus comprising:
- at least one data slicer configured to sample a signal based on a clock sampling position to obtain a first data sample and a second data sample;
- an integrator configured to integrate the signal from the first data sample to the second data sample to generate an integrated voltage;
- a first data slicer configured to sample the integrated voltage at a time of the second data sample to obtain an integrated sample;
- and
- a phase detector configured to determine whether the clock sampling position requires adjustment based on a sign of the integrated sample.
An apparatus comprising:
- a processor;
- and
- a non-transitory computer readable storage medium storing instructions that, when executed, cause the processor to:
- sample a signal based on a clock sampling position to obtain a first data sample and a second data sample;
- integrate the signal from the first data sample to the second data sample to generate an integrated voltage;
- sample the integrated voltage at a time of the second data sample to obtain an integrated sample;
- determine whether the clock sampling position requires adjustment based on a sign of the integrated sample;
- and
- adjust the clock sampling position to increase a timing margin and a voltage margin.
Dependencies are inferred from the claim text.