Systems, apparatus, and methods to debug accelerator hardware

An apparatus for debugging a neural network accelerator, the apparatus comprising:

• an interface with the neural network accelerator, the interface to receive output signals generated by the neural network accelerator;
• a signal path to receive a breakpoint configuration signal that indicates a breakpoint condition;
• and
• a debugging module to:
• detect an occurrence of the breakpoint condition based on an output signal generated by the neural network accelerator, and
• halt an operation of the neural network accelerator that is associated with the output signal,
• wherein data in the output signal is stored in a memory, data transfer between the neural network accelerator and the memory is through one or more memory transactions, a memory transaction comprises a memory address and a data item to be written to the memory address, and the breakpoint condition is specific to one or more memory addresses or one or more data items in the one or more memory transactions.

A method for debugging a neural network accelerator, the method comprising:

• receiving output signals generated by the neural network accelerator;
• receiving a breakpoint configuration signal that indicates a breakpoint condition;
• detecting an occurrence of the breakpoint condition based on an output signal generated by the neural network accelerator;
• halting an operation of the neural network accelerator that is associated with the output signal;
• and
• transmitting, to a memory, data in one or more output signals generated by the neural network accelerator,
• wherein data transfer between the neural network accelerator and the memory is through one or more memory transactions, a memory transaction comprises a memory address and a data item to be written to the memory address, and the breakpoint condition is specific to one or more memory addresses or one or more data items in the one or more memory transactions.