Differentially programmable magnetic tunnel junction device and system including same

An integrated circuit component including:

• an array of memory devices, individual ones of the memory devices including:
• a first electrode;
• a second electrode including an antiferromagnetic (AFM) material;
• and
• a memory stack including:
• a first layer adjacent the second electrode and including a multilayer stack of adjacent layers comprising ferromagnetic materials;
• a second layer adjacent the first layer;
• and
• a third layer adjacent the second layer at one side thereof, and adjacent the first electrode at another side thereof, the second layer between the first layer and the third layer, the third layer including a ferromagnetic material, wherein:
• the first layer includes a layer comprising a high tunneling magnetoresistance (high TMR) material (high TMR free layer) including Co, X and Pt, wherein X=Cu, Ni, Mn or Cr, the high TMR free layer adjacent one side of the second layer, the first layer further including a layer comprising at least one of W, or Ta between the multilayer stack and the high TMR free layer;
• and
• the third layer includes a layer comprising a high TMR material (high TMR fixed layer), the high TMR fixed layer adjacent another side of the second layer opposite the one side of the second layer, wherein the high TMR material of the high TMR free layer includes Co, X and Pt, wherein X=Cu, Ni, Mn or Cr, and is one of identical to or different from the high TMR material of the high TMR fixed layer;
• and
• one or more sense amplifiers connected to second electrodes of the array of memory devices.

An integrated circuit device assembly including:

• a printed circuit board;
• and
• a plurality of integrated circuit components attached to the printed circuit board, at least one of the integrated circuit components including:
• an array of memory devices, individual ones of the memory devices including:
• a first electrode;
• a second electrode including an antiferromagnetic (AFM) material;
• and
• a memory stack including:
• a first layer adjacent the second electrode and including a multilayer stack of adjacent layers comprising ferromagnetic materials;
• a second layer adjacent the first layer;
• and
• a third layer adjacent the second layer at one side thereof, and adjacent the first electrode at another side thereof, the second layer between the first layer and the third layer, the third layer including a ferromagnetic material, wherein:
• the first layer includes a layer comprising a high tunneling magnetoresistance (high TMR) material (high TMR free layer) including Co, X and Pt, wherein X=Cu, Ni, Mn or Cr, the high TMR free layer adjacent one side of the second layer, the first layer further including a layer comprising at least one of W, or Ta between the multilayer stack and the high TMR free layer;
• and
• the third layer includes a layer comprising a high TMR material (high TMR fixed layer), the high TMR fixed layer adjacent another side of the second layer opposite the one side of the second layer, wherein the high TMR material of the high TMR free layer includes Co, X and Pt, wherein X=Cu, Ni, Mn or Cr, and is one of identical to or different from the high TMR material of the high TMR fixed layer;
• and
• one or more sense amplifiers connected to second electrodes of the memory devices.