# US 12,484,148 B2 · Printed circuit board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,484,148 B2 - Document ID: US12484148B2 - Status: Granted - Kind: B2 - Application number: 17/742,916 - Filed: 2022-05-12 - Published: 2023-06-22 - Granted: 2025-11-25 - Earliest claimed: 2021-12-22 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Jin Uk Lee; Chi Won Hwang; Eun Sun Kim - Web page: https://patentgrep.com/patent/US12484148B2 ## CPC - H05K 1/111: {Pads for surface mounting, e.g. lay-out} - H05K 1/183: associated with components mounted in and supported by recessed areas of the PCBs - H05K 1/0298: {Multilayer circuits} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 1/181: associated with surface mounted components - H05K 3/4644: {by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602)} - H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil} - H05K 2201/10159: Memory - H05K 2201/10492: Electrically connected to another device - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A printed circuit board includes: a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; and a bridge embedded in the wiring substrate and having a plurality of connection pads thereon. An uppermost wiring layer of the plurality of wiring layers includes a plurality of bump pads connected to the plurality of connection pads, and a pitch between at least two adjacent connection pads of the plurality of connection pads is larger than a pitch between at least two adjacent ones of the plurality of bump pads. ## Claims ### Claim 1 A printed circuit board comprising: a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; and a bridge embedded in at least one of the plurality of insulating layers of the wiring substrate at a depth such that an upper surface of a body of the bridge is below an upper surface of a wiring layer of the plurality of wiring layers disposed on the at least one of the plurality of insulating layers of the wiring substrate, and having a plurality of connection pads disposed on the upper surface of the body of the bridge, wherein an uppermost wiring layer of the plurality of wiring layers includes a plurality of bump pads connected to the plurality of connection pads, the plurality of connection pads include a row of connection pads spaced apart from each other, the plurality of bump pads include a row of bump pads spaced apart from each other, and each distance between center lines of every two adjacent connection pads of the row of connection pads is larger than each distance between center lines of every two adjacent bump pads of the row of bump pads, the plurality of connection pads have a size greater than the plurality of bump pads. ### Claim 2 (depends on 1) The printed circuit board of claim 1, wherein the plurality of insulating layers include a core layer which is thicker than each of other layers of the plurality of insulating layers, the wiring substrate has a through portion penetrating through the core layer, and the bridge is disposed in the through portion in a face-up form such that the plurality of connection pads face the uppermost wiring layer. ### Claim 3 (depends on 2) The printed circuit board of claim 2, wherein the plurality of insulating layers further include a plurality of first and second build-up layers disposed on upper and lower sides of the core layer, respectively, and at least a portion of the through portion is filled by at least a portion of at least one of the plurality of first and second build-up layers. ### Claim 4 (depends on 1) The printed circuit board of claim 1, wherein the plurality of insulating layers include a core layer which is thicker than each of other layers of the plurality of insulating layers, the wiring substrate has a cavity penetrating through a portion of the core layer, and the bridge is disposed in the cavity in a face-up form such that the plurality of connection pads face the uppermost wiring layer. ### Claim 5 (depends on 4) The printed circuit board of claim 4, wherein the plurality of insulating layers further include a plurality of first and second build-up layers disposed on upper and lower sides of the core layer, respectively, and at least a portion of the cavity is filled by at least a portion of at least one of the plurality of first build-up layers. ### Claim 6 (depends on 1) The printed circuit board of claim 1, wherein the bridge includes a coreless substrate. ### Claim 7 (depends on 6) The printed circuit board of claim 6, wherein the coreless substrate includes a plurality of resin layers, a plurality of circuit layers, and a plurality of conductor via layers, and an uppermost one of the plurality of circuit layers includes the plurality of connection pads. ### Claim 8 (depends on 7) The printed circuit board of claim 7, wherein the plurality of resin layers include an organic insulating material. ### Claim 9 (depends on 1) The printed circuit board of claim 1, further comprising a plurality of connection conductors disposed on the plurality of bump pads, respectively, to be connected to the plurality of bump pads, respectively, wherein each distance between the centers of at least two adjacent connection pads of the plurality of connection pads is larger than each distance between centers of at least two adjacent ones of the plurality of connection conductors. ### Claim 10 (depends on 9) The printed circuit board of claim 9, further comprising first and second dies adjacent to each other and each mounted on the wiring substrate through the plurality of connection conductors and connected to each other through the bridge, wherein the first die includes a logic chip, and the second die includes a memory chip. ### Claim 11 (depends on 1) The printed circuit board of claim 1, further comprising a plurality of electrical connection metals each disposed on a lowermost one of the plurality of wiring layers to be connected to the lowermost wiring layer.