Error detection

A device for error detection comprising

• a corrector configured to read data from a memory as a first byte sequence and to correct the first byte sequence to generate a corrected byte sequence;
• and
• a checking unit configured to
• determine a byte of a second byte sequence as a function of at least one byte of the corrected byte sequence,
• determine a byte of the second byte sequence as impermissible when the byte is not equal to an assigned byte of the first byte sequence and if no error of a predefined error set corrupts the byte to the assigned byte of the first byte sequence,
• determine that the second byte sequence is impermissible when at least one byte of the second byte sequence is impermissible;
• and
• detect a false correction in response to the second byte sequence being determined as impermissible.

A false error correction detection system, comprising:

• a memory;
• a decoder coupled to the memory, configured to
• correct a first byte sequence read from the memory based on an error code to generate a corrected byte sequence;
• an encoder coupled to the memory and an output of the decoder, configured to
• receive the corrected byte sequence;
• and
• transform the corrected byte sequence to generate a second byte sequence;
• and
• a comparator coupled to the memory and the encoder, configured to
• receive the second byte sequence from the encoder and the first byte sequence;
• compare respective bytes of the second byte sequence to respective corresponding bytes of the first byte sequence;
• and
• provide indication of a false error correction when a pair of corresponding bytes have different values and no error of a predefined error set corrupts the byte of the second byte sequence to the corresponding byte of the first byte sequence.