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US 12,483,264 B2Granted
Analog-to-digital converter with 3rd order noise transfer function
AssigneeThe Regents of the University of Michigan
InventorsHsiang-Wen Chen, Michael P. Flynn
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Abstract
A VCO-Based Continuous-Time (CT) delta-sigma modulator (DSM) with a noise-shaping (NS) successive approximation register (SAR) quantizer for a 3rd order noise transfer function (NTF) is presented. An anti-aliasing filter (AAF) enables this new hybrid architecture. The 28 nm CMOS prototype NSQ VCO CTΣΔ achieves 84.2 dB SNDR and 86.8 dB DR within a 1 MHz bandwidth while consuming 1.62 mW at 100 MS/s. The core circuit occupies only 0.024 mm2. No calibration or coefficient tuning is required.
Claims8
An analog-to-digital converter, comprising:
- a voltage controlled oscillator configured to receive an an input voltage and outputs a voltage whose frequency varies according to the input voltage;
- a quantizer circuit with noise shaping capability;
- an anti-aliasing filter interconnected between an output of the voltage controlled oscillator and an input of the quantizer circuit;
- a feedback path from an output of the quantizer to an input of the voltage controlled oscillator;
- and
- a clocked-averaging circuit in the feedback path, where the clocked-averaging circuit converts bits from the quantizer to bits encoded with unary coding and shifts the bits with unary coding two bit positions each clock cycle.
3 more elements
An analog-to-digital converter, comprising:
- a voltage controlled oscillator configured to receive an input voltage and outputs a voltage whose frequency varies according to the input voltage;
- a Johnson counter serially coupled between the voltage controlled oscillator and a phase detector, where the Johnson counter is configured to receive the output from the voltage controlled oscillator and operates to divide frequency of the output received from the voltage controlled oscillator;
- a quantizer circuit with noise shaping capability;
- an anti-aliasing filter interconnected between an output of the phase detector and an input of the quantizer circuit, where notches of the anti-aliasing filter align with sampling frequency of the quantizer circuit;
- a feedback path from an output of the quantizer to an input of voltage controlled oscillator;
- and
- a clocked-averaging circuit in the feedback path, where the clocked-averaging circuit converts bits from the quantizer to bits encoded with unary coding and shifts the bits with unary coding two bit positions each clock cycle.
4 more elements
Dependencies are inferred from the claim text.