Self-calibrating buffered-voltage DAC

A self-calibrating buffered-voltage DAC circuit comprising:

• a DAC configured to receive an input digital signal and output a first analog voltage signal;
• a buffer amplifier configured to receive the first analog voltage signal from the DAC and provide a buffered second analog voltage signal;
• a voltage to frequency converter configured to selectively receive the first analog voltage signal and the second analog voltage signal and provide first and second output signals at respective first and second frequencies;
• a counter configured to receive the first and second output signals from the voltage to frequency converter and provide respective first and second digital output signals corresponding to the respective first and second frequencies;
• a comparator configured to receive the first and second digital output signals and provide a digital calibration offset;
• and
• a DAC error code module configured to receive a digital input code and the digital calibration offset and to provide an offset corrected input digital signal to the DAC.