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US 12,483,220 B2Granted
High resolution attenuator or phase shifter with weighted bits
AssigneeMurata Manufacturing Co., Ltd.
InventorsVikas Sharma, Peter Bacon
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AssigneeMurata Manufacturing Co., Ltd.
InventorsVikas Sharma, Peter Bacon
Estimating the term…
Digital step attenuator (DSA) and digital phase shifter (DPS) multi-stage circuit architectures that provide for high resolution. Embodiments use a dithering approach to weight bit positions to provide a much finer resolution than the lowest-valued individual stage. Bit position weights for stages are determined so as to enable selection of combinations of n bit positions that provide a desired total attenuation or phase shift range while allowing utilization of the large number of states (2n) available to produce fractional intermediate steps of attenuation or phase shift. The fractional intermediate steps have a resolution finer than the lowest-valued stage. Bit position weights may be determined using a weighting function, including weightings determined from a linear series, a geometric series, a harmonic series, or alternating variants of such series. In some embodiments, at least one bit position has a fixed value that is not determined by the bit position weighting function.
An electronic circuit, including:
A method for setting a value of signal alteration per stage for multiple stages of an electronic circuit and selecting a level of signal alteration within a total range of signal alteration enabled by the multiple stages, each stage having an input port and an output port, each stage configured to selectively alter the attenuation or phase of a signal applied to the input port, each stage being assigned one of N bit positions where N is greater than or equal to 1, each stage being digitally selectable by an associated control line to be either in a reference state in which the signal applied at the input port is conducted to the output port, or in an active signal alteration state, the method including:
Dependencies are inferred from the claim text.