US 12,483,216 B2 · Data recording based on dual ADC architecture

Abstract

A measurement system has a data acquisition architecture in one or more channels with storage in multiple sensor ranges. At least one sensor channel provides an analog measurement input signal, which is split into first and second amplifier-ADC paths, where a first path has relatively higher gain and smaller range than a second path. The digitized data is subject to cross-channel calibration that can serve as a trigger for the transfer of the two data streams into nonvolatile memory. The incoming data are temporarily stored for a specified period in a circular buffer, so that the trigger can also facilitate transfer of pre-trigger data from the buffer into the memory. A processor determines the presence or absence of any clipping of the higher-gain/smaller-range data and selects analysis of that smaller range data if no clipping is detected, but of the larger range data if clipping is detected.

Claims16

Dependent claims

A data acquisition architecture in a measurement system comprising:

a sensor channel providing an analog measurement input signal;
a first path connected to receive the analog measurement input signal and having a higher-gain analog amplifier and a smaller-range analog-to-digital converter to provide a first high-gain/small-range digital data stream;
a second path connected to receive the analog measurement input signal and having a lower-gain analog amplifier and a larger-range analog-to-digital converter to provide a second low-gain/large-range digital data stream;
and
a memory connected to the first and second paths to receive and store both the first high-gain/small-range and the second low-gain/large-range digital data streams,
wherein the first and second digital data streams are subject to cross-channel calibration between each other and the calibrated data streams are stored in the memory.

3 more elements

A measurement system, comprising:

at least one sensor channel providing an analog measurement input signal;
for each sensor channel, a first path connected to receive the analog measurement input signal and having a higher-gain analog amplifier and a smaller-range analog-to-digital converter to provide a first high-gain/small-range digital data stream, and a second path connected to receive the analog measurement input signal and having a lower-gain analog amplifier and a larger-range analog-to-digital converter to provide a second low-gain/large-range digital data stream;
a memory connected to the first and second paths to receive and store both the first high-gain/small-range and the second low-gain/large-range digital data streams from each sensor channel;
and
a processor enabled, for each sensor channel and for each sensor event stored in the memory, to:
(a) determine a presence or absence of clipping of the first higher-gain/smaller-range digital data stream;
and
(b) select the stored first higher-gain/smaller-range digital data stream for analysis if no clipping is detected, but select the stored second lower-gain/larger-range digital data stream for analysis if clipping of the stored first higher-gain/smaller-range digital data stream is detected.

5 more elements

Dependencies are inferred from the claim text.

Data recording based on dual ADC architecture

Life of this patent

Data recording based on dual ADC architecture

Life of this patent

Abstract

Claims16