Power amplifier system

A power amplifier system comprising:

• a main amplifier having a series stack of p-type transistors with a first signal input and a first signal output and a series stack of n-type transistors having a second signal input coupled to a common radio frequency, RF, input with the first signal input and a second signal output coupled to a common RF output with the first signal output, wherein the main amplifier exhibits a nonlinear gain characteristic with compression;
• a compression compensating (CC) amplifier having a third signal input coupled to the common RF input and a third signal output coupled to the common RF output, the CC amplifier comprising:
• a first p-type transistor coupled in parallel with one of the p-type transistors in the series stack of p-type transistors;
• a first n-type transistor coupled in parallel with one of the n-type transistors in the series stack of n-type transistors;
• and
• a class-C bias network having a first p-type bias output coupled to a gate of the first p-type transistor and a first n-type bias output coupled to a gate of the first n-type transistor, wherein the class-C bias network is configured to generate a first p-type class-C bias for the first p-type transistor, and the class-C bias network is further configured to generate a first n-type class-C bias for the first n-type transistor, wherein the first p-type class-C bias generated at the first p-type bias output and the first n-type class-C bias generated at the first n-type bias output are configured to generate an offset bias that aligns an activation of a class-C parallel amplifier with an inflection point of a compression in the main amplifier, wherein an additional gain provided by the compression compensating (CC) amplifier is configured to inversely match the compression of the main amplifier to compensate the compression of the main amplifier.