Amplifier circuit having low parasitic pole effect and buffer circuit thereof
AssigneeRichtek Technology Corporation
InventorsChun-Jen Yu, Ssu-Wei Huang, Hsuan-Kai Wang, Chi-Jen Yang, Hsien-Chih She
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AssigneeRichtek Technology Corporation
InventorsChun-Jen Yu, Ssu-Wei Huang, Hsuan-Kai Wang, Chi-Jen Yang, Hsien-Chih She
Estimating the term…
An amplifier circuit having low parasitic pole effect includes a preamplifier, an output transistor and a buffer circuit. The buffer circuit generates a driving signal to control the output transistor according to a preamplification signal generated by the preamplifier. The buffer circuit includes: a buffer input transistor generating the driving signal, wherein an input impedance at its control end is less than that of the output transistor; a low output impedance circuit having an output impedance which is less than an inverting output impedance of the buffer input transistor; an amplification transistor generating an amplification signal at its inverting output; and an amplification stage circuit amplifying the amplification signal by an amplification ratio, so that an equivalent output impedance at a non-inverting output of the buffer input transistor is less than or equal to a product of the reciprocal of an intrinsic output impedance thereof and an amplification ratio.
An amplifier circuit having low parasitic pole effect, comprising:
A buffer circuit for reducing the parasitic pole effect of an amplifier circuit, the buffer circuit being configured to generate a driving signal according to a pre-amplified signal generated by a pre-amplifier of the amplifier circuit, wherein the driving signal is configured to control a control end of an output transistor of the amplifier circuit to generate an output signal, wherein the buffer circuit comprises:
Dependencies are inferred from the claim text.