Hybrid backside thermal structures for enhanced ic packages

An apparatus, comprising:

• an integrated circuit (IC) die comprising integrated circuitry over a first side of a material layer comprising silicon, and a second side of the IC die opposite the first side of the material layer;
• and
• a composite layer on the second side of the IC die, wherein the composite layer comprises:
• a first constituent material having a first linear coefficient of thermal expansion (CTE) and a first thermal conductivity, the first thermal conductivity exceeding that of the material layer;
• and
• a second constituent material having a second CTE, the second CTE lower than the first CTE by at least 5 ppm/K, and a second thermal conductivity exceeding that of the material layer, wherein the composite layer comprises particles of one of the second constituent material embedded within a matrix of the first constituent material.

An apparatus, comprising:

• an integrated circuit (IC) die comprising integrated circuitry over a first side of a material layer comprising silicon, and a second side of the IC die opposite the first side of the material layer;
• and
• a composite layer on the second side of the IC die, wherein the composite layer comprises:
• a first constituent material having a first linear coefficient of thermal expansion (CTE) and a first thermal conductivity, the first thermal conductivity exceeding that of the material layer;
• and
• a second constituent material having a second CTE, the second CTE lower than the first CTE by at least 5 ppm/K, and a second thermal conductivity exceeding that of the material layer, wherein the composite layer comprises alternating layers of the first constituent material and the second constituent material.