Semiconductor device package having improved conductive stub coverage

A multi-layer substrate for a semiconductor device, the substrate comprising:

• an edge region in direct physical contact with an electromagnetic interference (EMI) shield;
• a central region connected to the edge region;
• a plurality of metal layers separated by non-conductive layers, including a top metal layer and a bottom metal layer;
• a dielectric material under the bottom metal layer defining a bottom dielectric surface of the substrate;
• wherein the top metal layer having a first thickness where the top metal layer directly physically contacts the EMI shield,
• wherein the bottom metal layer including a central portion in a location corresponding to the central region of the substrate and an edge portion in a location corresponding to the edge region of the substrate, the edge portion having a second thickness wherein the bottom metal layer directly physical contacts the EMI shield, the second thickness is less than the first thickness,
• a bottom surface of the edge portion directly contacts the dielectric material,
• wherein the central portion directly connected to the edge portion at a junction and having a thickness greater than a thickness of an entirety of the edge portion between the junction and the EMI shield, and
• wherein the central portion is offset from the bottom dielectric surface of the substrate by a first clearance, and the edge portion is offset from the bottom dielectric surface by a second clearance greater than the first clearance.

A semiconductor package comprising:

• a substrate having a top surface electrically connected to one or more integrated circuits mounted thereon and a bottom dielectric surface defined by a dielectric material positioned opposite the top surface;
• a top layer of the substrate having a first electrical contact contacting an electromagnetic interference (EMI) shield, the EMI shield encapsulating the one or more integrated circuits mounted to the substrate, the first electrical contact having a first thickness where the first electrical contact directly physically contacts the EMI shield;
• and
• a bottom layer of the substrate having a second electrical contact contacting the EMI shield, the second electrical contact including an edge portion having a second thickness where the second electrical contact directly physically contacts the EMI shield, the second thickness being less than the first thickness, and the second electrical contact further including a central portion directly connected to the edge portion at a junction and having a thickness greater than a thickness of an entirety of the edge portion between the junction and the EMI shield,
• wherein the central portion does not physically contact the EMI shield, and
• wherein the central portion of the second electrical contact has a first clearance from the bottom dielectric surface of the substrate and the edge portion of the second electrical contact has a second clearance from the bottom dielectric surface that is greater than the first clearance.