US 12,481,577 B2 · Instruction stream retrograding to enhance random test generation

Abstract

A computer system, computer readable storage medium, and computer-implemented method for retrograding an instruction stream to enhance random test generation. The method includes generating a test case for a design-under-test (DUT) comprising positioning one or more placeholder instructions in the test case. The method also includes identifying one or more benefiting instructions. The method further includes executing the test case by replacing the one or more placeholder instructions with one or more respective retrograding instructions. The one or more retrograding instructions influence the one or more benefiting instructions.

Claims20

Dependent claims

A computer system for retrograding an instruction stream to enhance random test generation comprising:

a random test generation system comprising a processor and configured to:
generate a test case for a design-under-test (DUT) comprising:
position one or more placeholder instructions in the test case;
identify one or more benefiting instructions;
and
generate one or more load instructions configured to identify one or more respective memory addresses that are to be accessed through one or more respective retrograding instructions;
and
execute the test case, by replacing the one or more placeholder instructions into the one or more respective retrograding instructions, wherein the one or more retrograding instructions influence the one or more benefiting instructions.

5 more elements

A computer readable storage medium having computer executable instructions that when executed by at least one computing device for retrograding an instruction stream to enhance random test generation, comprising instructions to:

generate a test case for a design-under-test (DUT) comprising instructions to:
position one or more placeholder instructions in the test case;
identify one or more benefiting instructions;
and
generate one or more load instructions configured to identify one or more respective memory addresses that are to be accessed through one or more respective retrograding instructions;
and
execute the test case, by replacing the one or more placeholder instructions into the one or more respective retrograding instructions, wherein the one or more retrograding instructions influence the one or more benefiting instructions.

4 more elements

A computer-implemented method for retrograding an instruction stream to enhance random test generation comprising:

generating a test case for a design-under-test (DUT) comprising:
positioning one or more placeholder instructions in the test case;
identifying one or more benefiting instructions;
and
generate one or more load instructions configured to identify one or more respective memory addresses that are to be accessed through one or more respective retrograding instructions;
and
executing the test case, by replacing the one or more placeholder instructions into the one or more respective retrograding instructions, wherein the one or more retrograding instructions influence the one or more benefiting instructions.

4 more elements

Dependencies are inferred from the claim text.

Instruction stream retrograding to enhance random test generation

Life of this patent

Instruction stream retrograding to enhance random test generation

Life of this patent

Abstract

Claims20