Low capacitance silicon controlled rectifier topology for overvoltage protection

An overvoltage protection circuit for protecting a radio frequency (RF) signal pad and a ground pad of an integrated circuit (IC), wherein the overvoltage protection circuit comprises:

• a first fin field-effect transistor (FinFET) silicon controlled rectifier (SCR) including a first PNP bipolar transistor and a first NPN bipolar transistor, wherein a collector of first NPN bipolar transistor is connected to a base of the first PNP bipolar transistor, and a base of the first NPN bipolar transistor is connected to a collector of the first PNP bipolar transistor;
• a fin field-effect transistor (FinFET) trigger circuit connected between an emitter of the first PNP bipolar transistor and the base of the first NPN bipolar transistor;
• and
• a linearity enhancement impedance connected between a reference voltage terminal and the emitter of the first PNP bipolar transistor, the linearity enhancement impedance configured to inhibit coupling of a RF signal from the RF signal pad to the reference voltage terminal.

A method of protecting an integrated circuit (IC) from electrical overstress, the method comprising:

• receiving an electrical overvoltage condition between a radio frequency (RF) signal pad and a ground pad;
• conducting a trigger current in response to the electrical overvoltage condition using a fin field-effect transistor (FinFET) trigger circuit that is connected between an emitter of a first PNP bipolar transistor and a base of a first NPN bipolar transistor;
• activating the FinFET SCR in response to the trigger current, wherein the FinFET SCR includes the first PNP bipolar transistor and the first NPN bipolar transistor, wherein a collector of first NPN bipolar transistor is connected to a base of the first PNP bipolar transistor, and a base of the first NPN bipolar transistor is connected to a collector of the first PNP bipolar transistor;
• and
• inhibiting coupling of a RF signal from the RF signal pad using a linearity enhancement impedance connected between a reference voltage terminal and the emitter of the first PNP bipolar transistor.