Imaging element, signal processing method for imaging element, and electronic equipment

A signal processing method for an imaging element including

• a pixel array section having disposed therein multiple pixels each including a photoelectric converting section, and
• an analog-to-digital converting section configured to convert an analog pixel signal read out from the pixels into a digital pixel signal,
• the analog-to-digital converting section including
• a Gray code latch circuit configured to latch a Gray code corresponding to the analog pixel signal read out from the pixels,
• a code converter configured to code-convert, into a binary code, the Gray code latched in the Gray code latch circuit,
• a temporary latch circuit configured to temporarily latch a predetermined binary code, and
• an arithmetic section configured to determine a difference between the binary code for a same bit resulting from code-conversion by the code converter and the predetermined binary code latched in the temporary latch circuit, wherein
• data transfer between the Gray code latch circuit and the code converter is processed in parallel a predetermined number of bits at a time, and an output from the code converter is transferred to the arithmetic section through data lines the number of which corresponds to the predetermined number of bits.

Electronic equipment comprising:

• an imaging element including
• a pixel array section having disposed therein multiple pixels each including a photoelectric converting section, and
• an analog-to-digital converting section configured to convert an analog pixel signal read out from the pixels into a digital pixel signal,
• the analog-to-digital converting section including
• a Gray code latch circuit configured to latch a Gray code corresponding to the analog pixel signal read out from the pixels,
• a code converter configured to code-convert, into a binary code, the Gray code latched in the Gray code latch circuit,
• a temporary latch circuit configured to temporarily latch a predetermined binary code, and
• an arithmetic section configured to determine a difference between the binary code for a same bit resulting from code-conversion by the code converter and the predetermined binary code latched in the temporary latch circuit, wherein
• data transfer between the Gray code latch circuit and the code converter is processed in parallel a predetermined number of bits at a time, and an output from the code converter is transferred to the arithmetic section through data lines the number of which corresponds to the predetermined number of bits.