Chip communication circuit, method, and apparatus based on automatic clock synchronization

A chip communication method based on automatic clock synchronization, comprising:

• determining clock synchronization information of a first battery management chip in response to a received control instruction, wherein the control instruction is sent by a controller to the first battery management chip among multiple battery management chips through a serial peripheral interface;
• replacing a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction;
• and
• transmitting the new control instruction to other battery management chips, so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction;
• wherein the other battery management chips are battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a sinusoidal sawtooth waveform is used for isolated communication between different battery management chips.

An electronic device, comprising a processor and a memory connected to the processor;

• wherein the memory stores computer execution instructions;
• and
• the processor executes the computer execution instructions stored in the memory to:
• determine clock synchronization information of a first battery management chip in response to a received control instruction, wherein the control instruction is sent by a controller to the first battery management chip among multiple battery management chips through a serial peripheral interface;
• replace a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction;
• and
• transmit the new control instruction to other battery management chips, so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction;
• wherein the other battery management chips are battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a sinusoidal sawtooth waveform is used for isolated communication between different battery management chips.