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US 12,476,643 B2Granted
Phase lock loop reference loss detection
AssigneeTexas Instruments Incorporated
InventorsShailesh Ganapat Ghotgalkar, Wei Fu, Venkatseema Das
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Abstract
In described examples, a first clock generator generates an output clock signal in response to an input reference signal and in response to a feedback signal that is generated in response to the output clock signal. A code generator generates a code in response to the input reference signal. A loss detector generates an indication of a loss of the input reference signal in response to the feedback signal and at least two codes generated by the code generator.
Claims20
A circuit comprising:
- a phase frequency detector (PFD) having a first input configured to receive a first clock signal, a second input, and an output;
- an oscillator having an input coupled to the output of the PFD, and an output coupled to the second input of the PFD;
- a detector circuit comprising a first clock input coupled to the output of the oscillator, a first output, and a second output;
- a clock generator circuit having an input coupled to the first output of the detector circuit, and an output;
- and
- a selector circuit having a first input coupled to the output of the oscillator, a second input coupled to the output of the clock generator circuit, and a selection input coupled to the second output of the detector circuit.
3 more elements
Dependencies are inferred from the claim text.