High voltage flip-chip on lead (FOL) package
AssigneeTexas Instruments Incorporated
InventorsAnindya Poddar, Thomas Dyer Bonifield, Woochan Kim, Vivek Kishorechand Arora
Life of this patent
Estimating the term…
Abstract
Described herein is a technology or a method for fabricating a flip-chip on lead (FOL) semiconductor package. A lead frame includes an edge on surface that has a geometric shape that provides a radial and uniform distribution of electric fields. By placing the formed geometric shape along an active die of a semiconductor chip, the electric fields that are present in between the lead frame and the semiconductor chip are uniformly concentrated.
Claims18
A method of making a packaged semiconductor device comprising:
- providing a lead frame with a first surface that includes a rounded edge shape;
- mounting a semiconductor die on the first surface of the lead frame;
- covering at least the first surface that includes a rounded edge shape and the semiconductor die with a mold compound.
A device comprising:
- a lead frame with a first surface that includes a rounded edge shape;
- a semiconductor die mounted on the first surface of the lead frame;
- and
- a mold compound covering at least the first surface that includes a rounded edge shape and the semiconductor die.
A semiconductor package comprising:
- a lead frame with a first surface that includes a smoothened edge shape;
- a semiconductor die mounted on the lead frame, wherein the semiconductor die is disposed onto the first surface of the lead frame;
- and
- a mold compound covering at least the first surface that includes a rounded edge shape and the semiconductor die.
Dependencies are inferred from the claim text.